Example likwid-topology
Cache Topology on Intel Xeon Broadwell
likwid-topology -c
... ******************************************************************************** Cache Topology ******************************************************************************** Level: 1 Size: 32 kB Type: Data cache Associativity: 8 Number of sets: 64 Cache line size: 64 Cache type: Non Inclusive Shared by threads: 2 Cache groups: ( 0 28 ) ( 1 29 ) ( 2 30 ) ( 3 31 ) ( 4 32 ) ( 5 33 ) ( 6 34 ) ( 7 35 ) ( 8 36 ) ( 9 37 ) ( 10 38 ) ( 11 39 ) ( 12 40 ) ( 13 41 ) ( 14 42 ) ( 15 43 ) ( 16 44 ) ( 17 45 ) ( 18 46 ) ( 19 47 ) ( 20 48 ) ( 21 49 ) ( 22 50 ) ( 23 51 ) ( 24 52 ) ( 25 53 ) ( 26 54 ) ( 27 55 ) -------------------------------------------------------------------------------- Level: 2 Size: 256 kB Type: Unified cache Associativity: 8 Number of sets: 512 Cache line size: 64 Cache type: Non Inclusive Shared by threads: 2 Cache groups: ( 0 28 ) ( 1 29 ) ( 2 30 ) ( 3 31 ) ( 4 32 ) ( 5 33 ) ( 6 34 ) ( 7 35 ) ( 8 36 ) ( 9 37 ) ( 10 38 ) ( 11 39 ) ( 12 40 ) ( 13 41 ) ( 14 42 ) ( 15 43 ) ( 16 44 ) ( 17 45 ) ( 18 46 ) ( 19 47 ) ( 20 48 ) ( 21 49 ) ( 22 50 ) ( 23 51 ) ( 24 52 ) ( 25 53 ) ( 26 54 ) ( 27 55 ) -------------------------------------------------------------------------------- Level: 3 Size: 18 MB Type: Unified cache Associativity: 20 Number of sets: 14336 Cache line size: 64 Cache type: Inclusive Shared by threads: 14 Cache groups: ( 0 28 1 29 2 30 3 31 4 32 5 33 6 34 ) ( 7 35 8 36 9 37 10 38 11 39 12 40 13 41 ) ( 14 42 15 43 16 44 17 45 18 46 19 47 20 48 ) ( 21 49 22 50 23 51 24 52 25 53 26 54 27 55 ) -------------------------------------------------------------------------------- ...
- Number of cache levels, groups and sizes
- Cache line size -> How many bytes are fetched from memory simultaneously?
- Associativity -> Memory addresses get mapped to cache addresses. How many cache lines from memory mapping to the same cache address can be held simultaneously?
Last modified 6 months ago
Last modified on Apr 4, 2018, 2:49:01 PM