Speaker
Mr
Hendrik Krause
(IPE)
Description
The CMS Phase-2 High-Granularity Calorimeter (HGCAL) employs a high-bandwidth front-end with significant variations in topology and data rates. To support the back-end firmware development, an FPGA-based front-end emulator has been implemented on a Serenity-S1 FPGA board. The emulator framework uses lpGBT link emulation along with output buffer emulation of the key front-end ASICs. Additional features include controlled error injection, such as corrupting data frames from the emulated front-end ASICs, and the generation of edge-case conditions. This provides a scalable and versatile platform for larger-scale system-level testing in preparation for the upcoming cassette and sector tests for the HGCAL detector.
Author
Mr
Hendrik Krause
(IPE)
Co-authors
Frank Simon
(KIT IPE)
Dr
Raghunandan Shukla
(Imperial College London)